One example of a known frequency conversion system as shown and discussed in greater detail hereinbelow and as shown in Japanese Patent Publication No. 21964-Showa 46 "Frequency Conversion System" is such that an input frequency f.sub.in is lowered to 1/N thereof by a frequency dividing circuit. The resultant frequency f.sub.in/N and an oscillation frequency .DELTA.f of another low frequency oscillator are combined by a carrier wave single side-band modulation system to produce a frequency of (f.sub.in/N) .sub.+ .sub..delta.f, and the input frequency f.sub.in is sampled to obtain as an output the product (N.sup.. .DELTA.f) of the frequency dividing ratio N and .DELTA.f, and this signal (N.sup.. .DELTA. f) is gated by .DELTA.f to produce a burst signal of N, and by lengthening a gate time in proportion to this N value a converted low frequency of (f.sub.in/N) is gated with the gate time set to N times, and the frequency is measured.
If, namely:
f.sub.in: input frequency PA1 f.sub.in/N output frequency of synchronous frequency dividing circuit PA1 f.sub.in/N .sub.+ .sub..delta. f: output frequency of frequency combining circuit (sampling frequency) PA1 .DELTA. t: slued rate,
The slued rate .DELTA.t is the difference between the reciprocals of f.sub.in/N and (f.sub.in/N .sub.+ .sub..delta.f), that is, ##EQU1##
If, further, it is so assumed that fL is the low frequency of a sampler output, ##EQU2##
From the formulas (1) and (2), it results that EQU fL = N.sup.. .DELTA.f (3) EQU fL .DELTA. f = N.sup.. .DELTA.f/ .DELTA.f = N (4)
this circuit, however, requires obtaining a burst signal of N and also lengthening of the gate time of the counter by pre-setting this N value. Thus, the circuit is somewhat defective in that the circuit construction and operation are complicated. Also, the operation thereof is somewhat unstable in relation to an input signal which is extremely high in frequency.